%FILENAME%
iverilog-12.0-2.1-x86_64.pkg.tar.zst

%NAME%
iverilog

%BASE%
iverilog

%VERSION%
12.0-2.1

%DESC%
Icarus Verilog compiler and simulation tool

%CSIZE%
2232986

%ISIZE%
6914212

%SHA256SUM%
f8b4fcd1ae2e0df5ac56218a6d9be54c1fcb4c0d9b89b7c856a20c20815ab3ca

%PGPSIG%
iQGzBAABCAAdFiEEiC3P5I4gUdSOJWKr87YHSI2zWkcFAmYycMwACgkQ87YHSI2zWkd46AwA6bSHATskKPBl+fatiLxWgMuFvKj/HGA6dXt+wjXRXF8o1YnYTAitKZQ5YvX9KhF20Q6oaHvdjsC62kMwHmqakC/rdnDCUX4UvpUr/YzqCQ4jqCPG92l9v//CWUrDOtvrOh+30da9ueGa/3A3WMmjNghMiR0REiLKKcFtXDeYVZTe9XupJikD/Q/dUI+lE70BjsfiPgfQVdg+Vt0boYSsXT5uwms568J8QK0oWqXUenjjT3aiZDCdkziCF9nNfkaVLtLFUmWv2gEcpvStQq9cG6cY8i2y1WdPiIicbYrGr1Q5fhESBtDpO7lAU5pIW4DAYabPSa37X/lr8LBvj0iLpOerk7jtZV52Yu77YXrcMWhDFr743nlCnhFIcfJGWDOvAN94wpY1ROTG55yIqW0e4W7EU0JOD6uQaVxeOO/9dwx9EtmyoidPcpfVMBtRw2LV7LulmVqPsOPxEVacqalYXfpXXsoeAcej99YqZZvYhDg1pCCzvm5eQCpkW0gSFNlg

%URL%
https://github.com/steveicarus/iverilog

%LICENSE%
GPL

%ARCH%
x86_64

%BUILDDATE%
1714581672

%PACKAGER%
CachyOS <admin@cachyos.org>

%DEPENDS%
zlib
bzip2

%MAKEDEPENDS%
gperf
git

